Title:
【発明の名称】I2t監視回路
Document Type and Number:
Japanese Patent JPH02500160
Kind Code:
A
Abstract:
An I2t monitoring circuit utilizes a multiplier to provide a signal that is representative of the squared value of a monitored current. The squared signal minus a DC level is provided as an input to a voltage-to-frequency converter and the output of the voltage-to-frequency converter is provided as an input to a down counter. The down counter is configured to decrement a stored value in response to the frequency of pulses received from the voltage-to-frequency converter and provide a signal in response to the magnitude of the stored value being decremented to a first predetermined magnitude. Periodically, the magnitude of the stored value in the down counter is refreshed to a second predetermined magnitude. When a signal is received from the down counter to indicate that the magnitude of the stored value has been decremented to the first predetermined magnitude, the signal is latched and a continuing signal is provided to indicate that a trip should occur. The trip signal is provided so that external circuitry can respond by either disconnecting the load from the monitored current or taking steps to reduce the magnitude of the monitored current.
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Inventors:
Jones, Gregory
Owens, William
Owens, William
Application Number:
JP50496188A
Publication Date:
January 18, 1990
Filing Date:
May 27, 1988
Export Citation:
Assignee:
Sandstrand Corporation
International Classes:
G01R19/252; H02H3/093; (IPC1-7): H02H3/093
Attorney, Agent or Firm:
Mitsuteru Soga (4 outside)