Title:
【発明の名称】ソース同期クロック型データリンク
Document Type and Number:
Japanese Patent JPH11505047
Kind Code:
A
Abstract:
A system and method for transmitting data, using a source synchronous clocking scheme, over a communication (or data) link. A source synchronous driver (SSD) receives a micropacket of parallel data and serializes this data for transfer over the communication link. The serial data is transferred onto the communication link at a rate four times as fast as the parallel data is received by the SSD. A pair of source synchronous clocks are also transmitted across the communication link along with the serial data. The pair of clocks are the true complement of one another. A source synchronous receiver (SSR) receives the serial data and latches it into a first set of registers using the source synchronous clocks. The serial data is then latched into a second set of registers in parallel. The second set of registers are referred to as "ping-pong" registers. The ping-pong registers store the deserialized data. In parallel, a handshake signal, which is synchronized to the clock on the receiving end of the communication link indicates that there is a stream of n contiguous data words being received by the SSR. The ping pong registers guarantee that the deserialized data is available (valid) for two clock cycles. This provides a sufficient window to account for the synchronizer uncertainty on the handshake signal, while introducing minimum latency.
Inventors:
Nikel, Ronald E.
Lenoski, Daniel E.
Gareth, Michael Bee.
Lenoski, Daniel E.
Gareth, Michael Bee.
Application Number:
JP53351496A
Publication Date:
May 11, 1999
Filing Date:
April 26, 1996
Export Citation:
Assignee:
SILICON GRAPHICS, INC.
International Classes:
G06F13/42; H04L7/04; (IPC1-7): G06F13/42; G06F13/42; H04L7/04
Attorney, Agent or Firm:
Kazuo Sato (3 others)