Document Type and Number:
Japanese Patent JPS5760796
Kind Code:
B2
Abstract:
Process for the production of layer-type printed circuits having conductive layers on both sides of a ceramic substrate in which an aperture is provided in a green (unfired) ceramic substrate, a high melting point pin is inserted into the aperture and thereafter the green substrate is sintered to bond the pin in place and provide for electrical connection between the two layers. A multi-layer composite can be made up by stacking a plurality of such substrates together with pins being provided to lock the substrates together and the entire multi-layer body is then sintered.
Inventors:
ARUTSUURU WAITSUE
PEETAA RESUKOFUAARU
PEETAA RESUKOFUAARU
Application Number:
JP1614774A
Publication Date:
December 21, 1982
Filing Date:
February 08, 1974
Export Citation:
Assignee:
SIEMENS AG
International Classes:
B32B15/04; H05K3/40; H05K3/46; H05K1/03; H05K1/09