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Title:
DRIVING AND CONTROLLING CIRCUIT FOR DC MOTOR
Document Type and Number:
Japanese Patent JPS58182493
Kind Code:
A
Abstract:
PURPOSE:To establish an effective means to prevent self-generated noises by a method wherein a PNP type transistor is parallelly connected to a DC motor whereto a Darlington circuit is connected via an NPN type transistor and the transistors share a common base. CONSTITUTION:With an input signal IN in an L-level state, an output buffer 10 is in a high-impedance state, which turns on the NPN type transistors 12, 13 of a Darlington circuit 14 for the rotation of a DC motor 16. With the input signal IN in an H-level state, the output buffer 10 is turned on and the base of a PNP type transistor 17 is grounded, which turns on a PNP type transistor 17 through an electromotive force generated by the DC motor 16 and controls the DC motor 16 through a reverse direction current. In this design, the NPN type transistor 12 and the PNP type transistor 17, sharing a common base, are to be turned on not simultaneously, whch prevents the generation of spike currents.

Inventors:
MATSUSHITA TAKESHI
MAEKAWA MOTOI
TAKAHASHI MAKOTO
KAZAMA YUUJI
TAKAISHI KAZUAKI
Application Number:
JP6491882A
Publication Date:
October 25, 1983
Filing Date:
April 19, 1982
Export Citation:
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Assignee:
TOKYO ELECTRIC CO LTD
International Classes:
H02P3/12; H02P7/288; (IPC1-7): H02P3/12; H02P7/28
Attorney, Agent or Firm:
Akira Kashiwagi



 
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