Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS5867038
Kind Code:
A
Abstract:
PURPOSE:To form operation modes of various kinds without increasing the number of input pins by changing the level of input voltage given to the input pins at plural stages in response to each threshold voltage of a Schmitt trigger circuit. CONSTITUTION:The levels of the output voltage VOUT of a buffer BF and Schmitt trigger circuits ST1-STn change to a ground level 0 from a predetermined positive voltage level VDD in order of the buffer BF and the Schmitt trigger circuit ST1- the Schmitt trigger circuit STn by slowly increasing the level of voltage VIN applied to the input pin P up to the predetermined positive voltage level VDD from the ground level 0. When the level of input voltage VIN is slowly lowered, on the ohter hand, the level of output voltage VOUT similarly changes up to the predetermined positive voltage level VDD from the ground level 0. Accordingly, the output of a plurality of patterns corresponding to the level of input voltage VIN is obtained from the buffer BF and the Schmitt trigger circuits ST1-STn every time the level of input voltage VIN is set variously at an arbitrary level among each threshold voltage VnL-VnN' and a plurality of mode signals MODE1-MODE2m corresponding to the output are acquired from a decoder 20.
Inventors:
KAWASAKI SOUICHI
Application Number:
JP16539181A
Publication Date:
April 21, 1983
Filing Date:
October 16, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G01R31/3185; H01L21/66; H01L21/822; H01L27/04; G01R31/28; H03K19/0175; H03M1/36; (IPC1-7): G01R31/28; H01L27/04; H03K13/175; H03K19/00
Attorney, Agent or Firm:
Takahisa Kimura