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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5889852
Kind Code:
A
Abstract:

PURPOSE: To remove the interference of signals between the input sections and between output sections of a metallized section, and to obtain stable push-pull operation up to higher frequency by severally positioning a grounding section between the input sections and between the output sections.

CONSTITUTION: The metallized section formed onto a substrate 10 made of ceramics contains a pair of the input sections 12, 14, a pair of the output sections 20, 22, a pair of island sections 28, 30 and the grounding section 36. The grounding section 36 intrudes between the input sections 12, 14 and between the output sections 20, 22 on the insulating substrate 10. A plurality of unit transistor cells are connected in parallel and formed into transistor chips 50, 52 brazed to the mounting sections 28, 30. Emitter regions and base regions shaping the unit transistor cells 50aW50d, 52aW52d in each transistor chip 50, 52 are connected to the base side and the emitter side connected to the outside on the silicon substrate. The emitter side 50 is connected at respective point on a grounding surface 38 by means of emitter bonding wires 66. The emitter side 52 is connected at several point on a grounding surface 40 by means of emitter bonding wires 67.


Inventors:
SHIOZAKI OSAMU
Application Number:
JP18810381A
Publication Date:
May 28, 1983
Filing Date:
November 24, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L25/18; H01L23/66; H01L25/04; (IPC1-7): H01L25/04
Domestic Patent References:
JPS54142578A1979-11-06
Attorney, Agent or Firm:
Uchihara Shin