Title:
NON-VOLATILE FLIP FLOP HAVING DYNAMIC RESETTING FUNCTION
Document Type and Number:
Japanese Patent JPS5891597
Kind Code:
A
Abstract:
A flip-flop further comprising two branches with MNOS elements serially connected with P channel MOS transistors for permitting a non-volatile storing of the information contained in a flip-flop at a chosen memorizing time. The memorizing of the state of the flip-flop can be made in a single cycle by raising the supply voltage of the device. In the same way, the resetting can be made in a single cycle by restoring abruptily the power voltage.
Inventors:
JIYANNMISHIERU BURISU
Application Number:
JP20284682A
Publication Date:
May 31, 1983
Filing Date:
November 18, 1982
Export Citation:
Assignee:
EFCIS
International Classes:
H01L21/8247; H01L29/788; G11C14/00; H01L29/792; H03K3/356; (IPC1-7): G11C11/40; H01L29/78
Attorney, Agent or Firm:
Yoshio Kawaguchi