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Title:
【発明の名称】デ-タチヤネル装置からの共通メモリアクセス方式
Document Type and Number:
Japanese Patent JPS5911136
Kind Code:
B2
Abstract:
PURPOSE:To execute the access easily, by executing the common memory access from a data channel device, through a common memory connection control part of a processor which has sent out an operation command to the data channel device. CONSTITUTION:Double common memories 1a, 1b are used in common by each processor 2a-2n. A data channel device 6 has a memory request controlling part 60, a processor number storage part 61, and a processor selecting part 62. In this state, a memory request from the device 6 is generated in the controlling part 60, and in accordance with display of the storage part 61, for instance, a memory 3a is selected by the selection part 62, and is transferred to a contention selection part 21 of the processor. The memory request of the device 6, which has been selected by this selection part 21 is transferred to a connection controlling part 23 by a memory switching part 22. Subsequently, the controlling part 23 receives the control information for connecting the devices 2a-2n and buses 7a, 7b, from a system controlling part 24, and sends out an access signal to the common memories 1a, 1b.

Inventors:
OKAYASU MASAHARU
SAITO ISAO
TAKAHASHI TOSHIHIRO
YAZAWA KATSUHIKO
IWAMOTO YOSHIHARU
ISHIKAWA TAKAHARU
Application Number:
JP17848780A
Publication Date:
March 13, 1984
Filing Date:
December 17, 1980
Export Citation:
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Assignee:
OKI DENKI KOGYO KK
NIPPON DENSHIN DENWA KOSHA
NIPPON DENKI KK
HITACHI SEISAKUSHO KK
FUJITSU KK
International Classes:
G06F15/16; G06F12/00; G06F13/12; G06F13/16; G06F15/167; (IPC1-7): G06F3/00; G06F13/00; G06F15/16
Attorney, Agent or Firm:
Yoshitaka Yoshitaka