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Title:
【発明の名称】5個のトランジスタを含むCMOSラッチ・セルおよび該セルを用いたスタティック・フリップフロップ
Document Type and Number:
Japanese Patent JPS60500794
Kind Code:
A
Abstract:
A five-transistor CMOS static latch cell useful in static flip-flop applications comprises, in one embodiment, an inverting latch cell having a data input node, a data storage node, a complementary data output node, a clock input node for selectively enabling or not enabling the cell, and a pair of voltage supply nodes. An essentially standard CMOS inverter has an output connected to the complementary data output node. The inverter includes a complementary pair of IGFETs i.e., an N-channel IGFET and a P-channel IGFET. The channel of the N-channel inverter IGFET selectively electrically connects the complementary data output node to ground. The channel of the P-channel inverter IGFET selectively electrically connects the complementary data output node to the voltage supply node. The inverter transistor gate electrodes are connected to the data storage node. A cross-coupled switching element comprising a second P-channel IGFET has its gate connected to the complementary data output node and is arranged to selectively connect the data storage node to the voltage supply node. A third P-channel IGFET has its channel arranged to selectively connect the data storage node to the voltage supply node when the cell is disabled. A second N-channel IGFET is arranged to selectively connect the data storage node to the data input node. A high impedance leakage current discharge path electrically connects the data storage node to the one voltage supply node, and discharges any leakage current on the data storage node. The high impedance leakage current discharge path may take a variety of forms, and need not comprise a discrete resistor.

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Inventors:
Margin, mosier
Ingerer, William Ernest
Application Number:
JP50154684A
Publication Date:
May 23, 1985
Filing Date:
March 23, 1984
Export Citation:
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Assignee:
GENERAL ELECTRIC COMPANY
International Classes:
H03K3/354; H01L27/11; H03K3/356; H03K3/3562; (IPC1-7): H03K3/354
Domestic Patent References:
JPS5922435A1984-02-04
JPS5892136A1983-06-01
JPS5158053A1976-05-21
Attorney, Agent or Firm:
Tokunji Ikunuma



 
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