Title:
半導体ウェハ検査用三次元イメージング
Document Type and Number:
Japanese Patent JP7184763
Kind Code:
B2
Abstract:
Methods and systems for improved detection and classification of defects of interest (DOI) on semiconductor wafers based on three-dimensional images are described herein. Three dimensional imaging of volumes of thick, layered structures enables accurate defect detection and estimation of defect location in three dimensions at high throughput. A series of images are acquired at a number of different wafer depths. A three dimensional image of a thick semiconductor structure is generated from the series of images. Defects are identified and classified based on an analysis of the three dimensional image of the thick semiconductor structure. In some examples, the three-dimensional image stack is visualized by contour plots or cross-sectional plots to identify a characteristic defect response. In some examples, the three-dimensional image is processed algorithmically to identify and classify defects. In another aspect, the location of a defect is estimated in three dimensions based on the three dimensional image.
Inventors:
Cortin Pavel
Danen Robert
meso philip
Danen Robert
meso philip
Application Number:
JP2019518445A
Publication Date:
December 06, 2022
Filing Date:
October 05, 2017
Export Citation:
Assignee:
KLA Corporation
International Classes:
H01L21/66; G06T7/00; G06V10/141; H04N13/221
Domestic Patent References:
| JP2016516307A | ||||
| JP2014142339A | ||||
| JP2012515434A | ||||
| JP7006948A | ||||
| JP2014517312A |
Foreign References:
| WO2015080480A1 |
Other References:
A.Arceo et al.,Use of TSOM for sub-11nm node pattern defect detection and HAR features,Proc. of SPIE,8681,米国,2013年04月18日,86812G-1-10
Attorney, Agent or Firm:
Patent Attorney Corporation YKI International Patent Office