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Title:
ACTIVE MATRIX SUBSTRATE
Document Type and Number:
Japanese Patent JPS62209514
Kind Code:
A
Abstract:

PURPOSE: To decrease wiring resistance and to solve problems such as deficient contrast and deficient resolution when a titled substrate is used for a liquid crystal display device by forming source line into two-layered structure.

CONSTITUTION: A thin semiconductor film 101 consisting of polycrystalline silicon, etc. is formed to an island shape on the insulating substrate 100 and a gate insulating film 101' by thermal oxidation, etc., is formed thereon. A gate wiring 102 and the 1st layer of a source line 102' are then formed by polycrystalline silicon, etc. having an impurity of an H-type (or P-type) and thereafter, a source.drain region is formed by an ion implantation method, etc. An inter-layer insulating film 103 consisting of HSG, PSG, etc. is formed over the entire surface and a contact hole 104 is formed on the source.drain region and the 1st layer of the source line. A picture element electrode 105' and the 2nd layer of the source line 105 are finally formed of a transparent conductive film of ITO, etc.


Inventors:
MANO TOSHIHIKO
MIYASAKA TSUGUMITSU
Application Number:
JP5284486A
Publication Date:
September 14, 1987
Filing Date:
March 11, 1986
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
G02F1/136; G02F1/1368; G02F1/1362; (IPC1-7): G02F1/133; G09F9/30
Attorney, Agent or Firm:
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