PURPOSE: To use effectively a storage circuit, by providing an arithmetic means to which outputs of the first and the second registers are inputted as continuous data to calculate this data and setting the arrangement area of the storage circuit optionally independently of page.
CONSTITUTION: When a page 1 is changed to a page 2, output "0000" of a page register 1 and output "11111111" of an index register 2 are transmitted onto a data bus 3 and are inputted to an arithmetic circuit 9. That is, contents of the circuit 9 become "000011111111", and +1 is added to them to attain "0001000000 00". Upper four bits "0001" are stored in the register 1, and lower eight bits "00000000" are stored in the register 2. Consequently, at the next access time, address 0 of an RAM8 is accessed, and address 256 of the page 2 of an RAM7 is accessed. The RAM7 has addresses 0W4095, and the RAM8 has addresses 0W 255.
KARIBE HIROHISA
IKEZAWA TOSHI
| JPS54155733A | 1979-12-08 | |||
| JPS5299027A | 1977-08-19 |