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Title:
ALIGNMENT MARKET FOR ELECTRON-BEAM DIRECT LITHOGRAPHIC USE AND ITS
Document Type and Number:
Japanese Patent JP2507906
Kind Code:
B2
Abstract:

PURPOSE: To make a marker for alignment use in a process whose structure is the same as that of an integrated circuit and to omit a special process used to make the structure of the maker by a method wherein the marker for alignment use is included in a pattern, for lower-part electrode use, which is used to manufacture an integrated circuit chip and the marker for alignment use is arranged in each chip region.
CONSTITUTION: Marker patterns for electron-beam direct drawing use are included in a chip pattern which is exposed by means of ultraviolet rays. When the chip pattern is stepped as the arrangement of 3×3 and exposed, only the marker patterns at the outer circumference form cross-shaped patterns and other patterns form double cross-shaped patterns. Consequently, the outer circumferential marker patterns which are to be utilized can be distinguished easily. Since the marker patterns are overlapped with the same pattern layer as the lower-part electrode of a Josephson junction element, a structure which is formed becomes a composite thin wire by NbN and Nb, a secondary-electron image whose contrast is large is obtained by scanning an electron beam and the position of a mark can be detected easily.


Inventors:
AOYANAGI MASAHIRO
NAKAGAWA HIROSHI
KUROSAWA ITARU
TAKADA SUSUMU
Application Number:
JP29068091A
Publication Date:
June 19, 1996
Filing Date:
October 09, 1991
Export Citation:
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Assignee:
KOGYO GIJUTSUIN
International Classes:
H01L21/027; H01L21/30; H01L39/24; (IPC1-7): H01L21/027; H01L39/24
Domestic Patent References:
JP3220784A
JP5768028A
JP5612730A
JP1214117A
Attorney, Agent or Firm:
Director, Electronic Technology Research Institute, AIST