PURPOSE: To prevent the lowering of the information process efficiency, by carrying out the readout of an original memory after a replacing action according to the error and when the readout is carried out to the address and making effective the readout of an alternating memory only when the error is confirmed.
CONSTITUTION: The write-in data given from an external device 15 is written in the 1st memory 2 of a memory part 1 and then read out through a read data selecting part 4 to be stored in a data register 10. This readout data receives an error checking based on the check bit, and the error is detected by an error detecting circuit 12. Thus checking result is reported to the device 15 via a syndrome decoder 14, and the corrected data is written in a memory 3. After this, the error address of an alteration control part 7 is compared with the address given from the device 15 at a comparator 5 for the readout of a memory part 1. Then the circuit 4 is controlled. The data from the memory 3 is made effective only when the circuit 12 detects an error in the information given from the memory 2. Accordingly the memory 3 having a low response speed is used only when necessary to prevent the lowering of the information process efficiency.
USAMI RIYUUICHI
ITOU SHIYUUJI
YAMADA TOYOSHI
