Title:
ANALOG ARITHMETIC UNIT
Document Type and Number:
Japanese Patent JP3019504
Kind Code:
B2
Abstract:
PURPOSE: To reduce power consumption and to reduce areas by providing an input voltage hold condenser on the positive input side of an operational amplifier and inputting the second signal to the negative input side.
CONSTITUTION: On the positive input side of an operational amplifier 1, a hold condenser CH is connected. Through a CMOS switch composed of MOSFET M11 andM12, an analog input signal to be inputted from a terminal IN is sampled to held in the condenser CH. On the negative side of the operation amplifier 1, the input resistance R1 and feedback resistance Rr and connected. When the CMOS switch composed of MOSFET M15 and M16 is closed, voltage VRI to be inputted from the terminal RI and the voltage VIN to be inputted from the terminal IN are calculated, and voltage VOUT to be supplied by a formula I can be obtained at an output terminal OUT. Thus, the function of the sample- and-hold and the operation processing such as subtraction and amplification or the like can be realized by using the circuit including one operation amplifier 1.
More Like This:
| JPS5858640 | 【考案の名称】デイスプレイ装置 |
| JPS63225821 | SIGNAL PROCESSOR |
| JPH06260937 | BREAK-UP DEVICE |
Inventors:
Susumu Tanimoto
Application Number:
JP19464691A
Publication Date:
March 13, 2000
Filing Date:
August 05, 1991
Export Citation:
Assignee:
NEC
International Classes:
G06F3/05; G06G7/14; H03M1/12; H03M1/14; (IPC1-7): H03M1/14; G06F3/05; G06G7/14
Domestic Patent References:
| JP59135927A | ||||
| JP1184699A | ||||
| JP60148260A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)
Previous Patent: カーテン開閉装置
Next Patent: EXPOSURE APPARATUS AND MANUFACTURE OF SEMICONDUCTOR CHIP USING SAME
Next Patent: EXPOSURE APPARATUS AND MANUFACTURE OF SEMICONDUCTOR CHIP USING SAME