To provide an analog multiplication circuit with characteristics little changing from phase to phase by reducing the effect of errors in a multiplication signal that are uneven from quadrant to quadrant.

Buffer circuits 2, 3, 4 switchable between inversion and non- inversion are provided on the input and output sides of an analog multiplier (analog multiplication IC) 1. The buffer circuits 2, 3 are controlled by a control circuit 5 so that the multiplier 1 can operate successively in all the four quadrants. When the output of the multiplier 1 is inverted, the buffer circuit 4 is controlled to return the output to a non-inverted state, and the output of the buffer circuit 4 is leveled by an integration circuit 6. This can reduce the effect of errors of the multiplier 1 that are uneven from operating quadrant to operating quadrant.