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Title:
ANALOGUE-DIGITAL CONVERTER
Document Type and Number:
Japanese Patent JPS5491169
Kind Code:
A
Abstract:

PURPOSE: To enhance reliability by giving a simple circuit constitution to an A/D converter circuit and reducing cost in case that resolution is approximately two digits.

CONSTITUTION: A measured analogue voltage input from input terminal 1 is applied to sample hold circuit 2 which samples and stores the input according to the period of timing pulses from inverter 11, and the output of this circuit 2 is applied to comparator 4 together with the output of saw tooth wave generator 3 which is generated at a period equal to the sample period. Then, pulses until the time when the voltage of the saw tooth wave becomes equal to the sample-held voltage are outputted to the output of comparator 4. Further, this pulse output is applied to gate 5, and pulses of clock pulse generator 6 are made connected only during this output pulse and are applied to counter circuit 12. Then, clock pulses of the gate output are counted by counter circuit 12, and binary code is outputted to register 13.


Inventors:
YAMAZAKI TAKAHIRO
KATAGIRI TOSHIYUKI
Application Number:
JP15962177A
Publication Date:
July 19, 1979
Filing Date:
December 28, 1977
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03M1/56; (IPC1-7): H03K13/20



 
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