Title:
APPARATUS FOR HOLDING SEMICONDUCTOR WAFERS
Document Type and Number:
Japanese Patent JPS5264872
Kind Code:
A
Abstract:
This patent discloses apparatus for retaining a semiconductor wafer in a predetermined position or orientation to permit dicing of the wafer into discrete semiconductor chips of a predetermined size without dislocation of the chips during the dicing operation, the chips being arranged in columns and rows with a kerf area intermediate adjacent chips. The apparatus comprises a base member having a semicondcutor wafer positioning area with a connection to the base member for applying the vacuum to a plurality of spaced apart apertures in the wafer receiving area, the apertures corresponding to the location of the chips. A cover plate, adapted for superimposition of the wafer receiving area, includes a plurality of interdigitated ribs and slots, the slots extending through the cover and dimensioned for alignment with the kerf area of the wafer, the ribs having strips of compressible material underlying the ribs for superimposed pressing relation on the wafer so that when a wafer is being cut through the slots along the kerf area, the vacuum being drawn coupled with the pressing engagement of the strips on the wafer inhibit dislocation of the chips during the dicing operation.
Inventors:
SARUBATOORU AARU KUOMO JIYUNIA
Application Number:
JP12842476A
Publication Date:
May 28, 1977
Filing Date:
October 27, 1976
Export Citation:
Assignee:
IBM
International Classes:
B28D5/04; B25B11/00; B28D5/00; H01L21/301; H01L21/683; (IPC1-7): H01L21/66