PURPOSE: To cope instantly with diversified arithmetic processing by supplying a partial arithmetic value or a correction part arithmetic value to an arithmetic result output circuit under the control of an arithmetic mode control signal.

CONSTITUTION: An AND gate G5 gating an output of an adder ADD0 by using a gate signal C3, an OR gate OR 1 ORing a carrier signal on a line 10 and an MSB signal of the adder, and a selector SEL3 outputting an output signal of a NOT gate G1 and an output signal of the OR gate 1 and a '0' signal by using selector control signals C10, C11 alternatively are provided, the output signal and '0' signals of the selector SEL3, an AND gate G6, an OR gate OR2 and a NAND gate G4 and an OR gate OR2 signal are outputted alternatively by using selector signals C20, C21 and the signal is fed to a selection control input of the SEL2.