PURPOSE: To constitute a mean value arithmetic circuit obtaining a mean value of one circuit regardless of the number of input signals, and to minimize the number of components by providing the mean value arithmetic circuit to obtain the mean value of the plural input signals and plural comparison arithmetic circuits to have a prescribed amplification degree to execute the comparison operation of respective input signals of the plural input signals and the output signal of the mean value arithmetic circuit.

CONSTITUTION: The titled circuit has a mean value arithmetic circuit 11 to obtain the mean value of three input signals V1, V2 and V3, a first comparison arithmetic circuit 121 having a prescribed constant amplification degree to execute the comparison operation of the output signal of the input signal V1 and the mean value arithmetic circuit 1, a second comparison arithmetic circuit 122 having the prescribed constant amplification degree to execute the comparison of the output signal of the input signal V2 and the mean value arithmetic circuit 11 and a third comparison arithmetic circuit 123 having the prescribed constant amplification degree to execute the comparison operation of the output signal of the input signal V3 and the mean value arithmetic circuit 11. The comparison arithmetic circuits 121W123 have the prescribed amplification degree. Thus, the circuit can be composed of the minimum number of the components.