Title:
ARITHMETIC UNIT FOR MULTIPLAYING LONG INTEGER WITH MODULO AN INTEGER M AND R.S.A. CONVERTER HAVING SUCH MULTIPLICATION DEVICE
Document Type and Number:
Japanese Patent JP3213628
Kind Code:
B2
Abstract:
PURPOSE: To increase the processing capacity speed of a systolic machine to multiply two natural numbers by modulo M.
CONSTITUTION: The sytolized modular arithmetic device has a control module, a series arrangement of the processing module following the same and further an end module following the same. The bit '1' in an integer P is multiplied by Q every time after the intermediate product is doubled and the bit '0' in P is simply doubled in order to multiply the integer P and the integer Q with modulo third multibit integer M. The normalization of the mod M is embodied by adding the complements of M, W under the control of the propagated carry value. The similar procedures are proposed for exponentations Q F as well.
Inventors:
Joseph Laurentius Wilhelms Kessels
Application Number:
JP6220092A
Publication Date:
October 02, 2001
Filing Date:
March 18, 1992
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
G06F7/52; G06F7/506; G06F7/523; G06F7/525; G06F7/53; G06F7/552; G06F7/72; G09C1/00; (IPC1-7): G06F7/52; G06F7/552; G06F7/72
Attorney, Agent or Firm:
Akihide Sugimura (5 outside)