Title:
ARITHMETIC UNIT
Document Type and Number:
Japanese Patent JPH0746145
Kind Code:
A
Abstract:
PURPOSE: To reduce the number of operation steps for branch metric calculation.
CONSTITUTION: Two data memories 21 and 22 addressed by the same pointer 38, an ALU 30, an adder 31 which performs addition in parallel with the ALU 30, and registers 32 to 35 which are used as pairs at the time of simultaneous processing execution of the ALU 30 and the adder 31 are provided. Contents of addresses designated by the same pointer 38 are read out from two data memories 21 and 22 and are inputted to the ALU 30 and the adder 31. Contents of pairs of registers 32 and 35 are inputted to the other inputs of the ALU 30 and the adder 31 and are added, and respective operation results are stored in pairs of registers 32 to 35 again.
Inventors:
ASANO NOBUO
UESUGI MITSURU
ISHIKAWA TOSHIHIRO
OKAMOTO MINORU
UESUGI MITSURU
ISHIKAWA TOSHIHIRO
OKAMOTO MINORU
Application Number:
JP19109293A
Publication Date:
February 14, 1995
Filing Date:
August 02, 1993
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F17/10; H03M13/23; (IPC1-7): H03M13/12; G06F17/10
Attorney, Agent or Firm:
Akira Kobiji (2 outside)
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