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Patent Searching and Data


Title:
ASSEMBLY METHOD OF ELECTRONIC COMPONENT
Document Type and Number:
Japanese Patent JP3024339
Kind Code:
B2
Abstract:

PURPOSE: To insulate conductor interconnections from each other in the assembly method, of an electronic component, wherein the conductor interconnections whose interval is narrow at various kinds of electric apparatuses are bonded.
CONSTITUTION: ITOs 8 which have been arranged and installed on a glass substrate 7 and conductors 11 which have been arranged and installed on an insulator 10 are bonded by using a conductive adhesive 9; a bonded part 12 is scanned by using a high-energy beam; a circuit is formed; the ITOs 8 are made conductive to the conductors 11. By this method, the circuit is formed after they have been bonded. As a result, even fine conductor interconnections can be bonded easily, and their insulation can be kept.


Inventors:
Kazushi Azuma
Takahiro Matsuo
Application Number:
JP1975992A
Publication Date:
March 21, 2000
Filing Date:
February 05, 1992
Export Citation:
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Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
G02F1/1345; G09F9/30; H05K3/36; H05K1/11; H05K3/32; (IPC1-7): H05K3/36
Domestic Patent References:
JP279491A
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)