To reduce the circuit scale, to attain high speed processing, and to make an operating time limitless by using a general-purpose current time counter.
A scheduling section 1 has a logical transmission time management memory 11, a logical transmission time comparison/update circuit 12, a difference monitor circuit 13, a transmission time decision circuit 14, a parameter memory 15 and an adder circuit 16, and before comparing a current time with a logical transmission time in cell scheduling processing, a difference between the current time and the logical transmission time is set smaller than a maximum value of the count of the current time to update the logical transmission time into the current time. In the case that no cell reaches for a long time, that comparison discrimination between the current time and the logical transmission time is not made abnormal aven if the current time exceeds one period of the current time counter 35.
Next Patent: INTRA-LOGIC CHANNEL BAND EQUALLY DISTRIBUTING METHOD, LOGIC CHANNEL BAND GUARANTEEING DEVICE AND STO...