Title:
ATM QUEUING AND SCHEDULING DEVICE
Document Type and Number:
Japanese Patent JP3553185
Kind Code:
B2
Abstract:
PURPOSE: To provide a device which limits a peak cell rate by generating a minimum delay value to be applied to a buffer device by a controller and using it with a maximum delay value to schedule specific cells for simultaneous transmission.
CONSTITUTION: A buffer store 4 is connected to an input line for reception of an ATM cell 2 and an output line for transmission of the ATM cell 2. A controller 6 receives a channel identifier VCI and a path identifier VPI for each cell and applies them to the buffer store 4. The controller 6 generates a first signal indicating a maximum delay value Dmax which is used to schedule specific cells for transmission in accordance with the control of a cell rate which a calendar can maintain. In relation to the first signal applied to the buffer 4, the controller 6 generates a second signal indicating a minimum delay value Dmin which is used to schedule specific cells for transmission in accordance with the control of a cell rate in the calendar. This minimum delay value controls the peak cell rate.
Inventors:
Andrew Timothy Hayter
Simon Paul Davis
Paul Perseed Mom Tahan
Eugen Bernhard Warmair
Simon Paul Davis
Paul Perseed Mom Tahan
Eugen Bernhard Warmair
Application Number:
JP6456795A
Publication Date:
August 11, 2004
Filing Date:
March 23, 1995
Export Citation:
Assignee:
Rook Manor Research Limited
International Classes:
H04Q3/00; H04Q11/04; H04L12/56; (IPC1-7): H04L12/28; H04Q3/00
Domestic Patent References:
| JP5130136A | ||||
| JP7095211A |
Attorney, Agent or Firm:
Toshio Yano
Toshiomi Yamazaki
Toshiomi Yamazaki