PURPOSE: To provide the automatic designing method and device of a logic circuit capable of generating a circuit with less logical element number and logical stage number in the case of preparing the logic circuit including a multiplier and the multiplier for performing multiplication in which a multiplier or a multiplicand is a constant and to provide the multiplier for performing the multiplication in which the multiplier or the multiplicand is the constant.

CONSTITUTION: When the multiplier is a constant (141: yes,) a circuit for performing the multiplication regarding the logical NOT number of the all bits of the multiplier is generated (147) when the number of posibits for which a value in the multiplier is '1' is equal to or more than '3' (143: no) and is more than the number of negabits +1 for which the value is '0' (145: yes.) The multiplier is divided (146) so that the adder of partial products becomes like a well-balanced bisecting tree when the number of the posibits is less and an addition shift multiplier for obtaining the partial product only for the bits for which the value is '1' is generated (144) when the posibits is equal to or less than '2'.