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Title:
AUTOMATIC FOCUS CONTROLLING CIRCUIT
Document Type and Number:
Japanese Patent JPS6097784
Kind Code:
A
Abstract:

PURPOSE: To obtain an accurate and effective automatic focus circuit which can also evaluate the level change in the vertical direction by detecting the level change of a luminance signal in the neighboring horizontal direction and vertical direction adding and averaging both level changes.

CONSTITUTION: An orignal signal and a 1H delaying signal which is led out from a 1H delaying circuit 12, are inputted to the first subtaction circuit 14, and in addition, they are inputted to the first square-law circuit 16 which detects the level change in the vertical direction. The delaying signal and the original signal from a delyaing circuut 13 are inputted to the second substraction circuit 15, and in addition, they are inputted to the second square-law circuit 17 which detects the level change in the horizontal directon. These two outputs of the square-law circuit are averaged 6 after adding 18, and the averaged output is made into digital by field frequency in an A/D conversion circuit 7. This digital signal is transferred to the first memory 8 and the second memory 9 by every field, and the rotational direction of focus motor is controlled by polarity of the difference of both memory outputs.


Inventors:
HIRAMATSU TATSUO
Application Number:
JP20660883A
Publication Date:
May 31, 1985
Filing Date:
November 01, 1983
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
G02B7/28; G02B7/36; H04N5/232; (IPC1-7): G02B7/11; H04N5/232
Domestic Patent References:
JPS5847576A1983-03-19
JPS5397826A1978-08-26
JPS5848576A1983-03-22
Attorney, Agent or Firm:
Takuji Nishino