PURPOSE: To obtain a reference voltage for emitter coupled logic(ECL) which is tolerant of source voltage variation by providing a bias network, which supplies a 1st and a 2nd ECL reference voltage, with a differential amplifier.

CONSTITUTION: The differential amplifier which detects the potential of nodes 44 and 46 by NPN bipolar transistors(TR) 50 and 52 and amplifies and feeds the different back to a node 28 hold the operation points of the nodes 44 and 46 at the same potential. Then P channel FETs 54 and 56 form mirror constitution and is adapted to asymmetrical output. Resistors 58 and 60 increase the output impedance of a P channel FET 54 of a node 62 and the gain of the differential amplifier is therefore increased. The P channel FET 64 connects the collector terminal of an NPN TR 26 to the node 28. When the FET 64 is not present, all the TRs are OFF and have stable operation points where VREF1=VREF2=0. The FET 64 sends a supply voltage to the node 28 when this state is entered to prevent the circuit from becoming inactive.