Title:
BIAS CIRCUIT
Document Type and Number:
Japanese Patent JPS588329
Kind Code:
A
Abstract:
PURPOSE:To avoid adverse effect on a reference voltage source, by connecting a current decision circuit of current mirror constitution to an emitter of a transistor (TR) the base of which is connected to a reference voltage source, via a resistor and to a collector directly. CONSTITUTION:A collector of a TRQ1 the base of which is connected to a reference voltage Vref is directly connected with a negative current decision circuit 11 and a positive side current circuit 12 is connected to the emitter via a resistor R0. The circuit 11 has TRs Q2 and Q3 of diode connection is series and TRs Q2 and Q3 of current mirror connection. The circuit 12 has TRs Q5 and Q6 in diode connection is series and has TRs Q7 and Q5 of current mirror connection. The collectors of the TRs Q4 and Q7 are connected to negative and positive bias current output terminals Iout' and Iout. Through the circuit constitution like this, a current flowing to a voltage Vref source via the base of the TRQ1 is very less.
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Inventors:
AOKI HIDEHIKO
Application Number:
JP10592581A
Publication Date:
January 18, 1983
Filing Date:
July 07, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H03F1/30; G05F3/26; G05F3/30; (IPC1-7): G05F1/56; H03F1/30
Attorney, Agent or Firm:
Takehiko Suzue
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