To provide a digital board inspection system without the omission of inspection check by reducing the inspection man-hour of a printed board.
Data 0x5..., 0xA..., whose adjacent bits are logic-inverted, data 03x..., 0xC..., in which bits detached by one bit are logic-inverted, and a program which CPU reads/writes data are provided in a system starting memory. The defective bit of a data bus is detected by a specified analysis method by observing the change of data appearing on the data bus at the time of a read/ write cycle. Plural addresses where the bits are raised (logic '1' is given) to only one bit and a program in which CPU issues the addresses are provided in the system starting memory. Thus, the defective bit of the address bus is detected by the specified analysis method by observing the change of the address appearing on the address bus at the time of issuing the address.
KANZAKI HIDEYUKI
KAGAWA TETSUO
KITAMURA TOMOHIKO
