PURPOSE: To make easy adjustment, maintenance and inspection of a data processor including program deback by making possible free decision of the break point of a program to be executed.
CONSTITUTION: The control circuit is constituted by BP number detection circuit 1 which detects the device number of break point BP sent from the data processor to address by line ADR, first comparator 3, register number detection circuit 5 which applies entered signal RR to register 4 where the number of execution of a circular program is set through SATA, counter 6 which counts the number of BP passage, and second comparator 7 which compares the output of register 4 with that of counter 6 on occasion and, when the output coincides with the other one, applies interrupt signal INT for stop of program execution.
OOTA YOSHIHITO
JPS4735832B1 | ||||
JPS506747U | 1975-01-23 | |||
JPS5319738A | 1978-02-23 |