PURPOSE: To detect a burst error continuously at a high speed and also by the real time, by generating a burst error signal by being set by an error pulse, and providing the FF which is reset when the number of continuous nonerror pulses has exceeded the prescribed value.

CONSTITUTION: An error pulse which has been detected is provided to the set terminal S of the FF12 from the terminal 11, and the Q terminal is connected to the output terminal 13. As for the AND gate 16, when a output of the FF12 is in a high level, that is to say, a burst error signal is being generated, and also the error pulse is not provided from the AND gate 15, a clock pulse of the terminal 17, that is to say, a nonerror pulse is provided to the clock terminal CK of the counter 14 through the AND gate 16. Also, when the error pulse passes through the NAND gate 15, the counter 14 is reset. When the counter 14 has counted the prescribed value, its output is provided to the OR gate 19, and also it is provided to the reset terminal R of the FF12.