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Patent Searching and Data


Title:
BUS CIRCUIT
Document Type and Number:
Japanese Patent JPH0235554
Kind Code:
A
Abstract:

PURPOSE: To prevent outputs of circuits which are connected directly to a bus line from colliding against each other by providing a plural bus circuits with a means which detects the noncoincidence between the input signal of its output circuit and the input signal from the bus line and turning off an output circuit in the case of the noncoincidence.

CONSTITUTION: The signal of the output circuit 11 on the side of the bus line 3 and a signal branched from an input signal A are inputted to an EXNOR circuit 13 through a gate 15 for input phase difference adjustment. Then when both inputs are not coincident, its output and a control signal C are inputted to an NAND circuit 14 through a NOT circuit 15 together with the output and the output circuit 11 is brought under inversion control with its output. Thus, when a collision signal is detected, the output circuit 11 is turned off to prevent the collision.


Inventors:
UNO SHUICHI
MIHASHI TOMIO
Application Number:
JP18573788A
Publication Date:
February 06, 1990
Filing Date:
July 26, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F3/00; G06F13/00; G06F13/36; (IPC1-7): G06F3/00; G06F13/00; G06F13/36
Attorney, Agent or Firm:
Yoshishige Tasaka (2 outside)