PURPOSE: To automatically decide a cache illicit state by having the comparison between both data read out of a cache memory retrieving means and a main storage retrieving means.

CONSTITUTION: A comparator 19 compares the data contents of a bus write register 11 storing the cache internal data and the data contents of a bus read register 12 storing the data read out of a main storage 20. When the coincidence is obtained between both data contents, the address value generated from a cache address generating circuit 4 is updated. Then the operation is repeated. If no coincidence is obtained between both data contents, a data selection circuit 13 selects successively the contents of a bus address register 10, the register 11, and the register 12. These selected contents are stored corresponding to each other in a work memory 14. Thus a cache trouble is automatically decided.