PURPOSE: To obtain a capacitance built-in type semiconductor device having high reliability easily by forming a capacitance loading section to a clearance between a chi-loading section support lead and an external leading-out lead.

CONSTITUTION: An adjacent external leading-out lead 6C is connected to a support lead 4C for a semiconductor chip loading section, and a chip type capacitance loading section 12C is formed to the opposite sections of another support lead 4C' and an adjacent external leading-out lead 7C. An SiO2 layer 13C on a semiconductor chip loading section 2C is plated with Ni 14C. An electrode for a chip type capacitor 8C is soldered to the capacitor loading section 12C, and brazed 15C to a semiconductor chip 9C. An electrode for the chip 4C is connected 11C to the inner end of a lead fro external leading-out, and sealed with an epoxy resin 10C. According to the constitution, mounting density is increased while the adverse effect of inductance by the wiring of the capacitor is eliminated, thus improving thermal shock resistance, then acquiring a device having high reliability.