Title:
CELL ARRAY REGION OF NOR TYPE MASK ROM ELEMENT AND FORMATION METHOD
Document Type and Number:
Japanese Patent JP2001284472
Kind Code:
A
Abstract:
To provide a cell array region and the formation method of a NOR type mask ROM device.
A plurality of word lines WL1', WL2', WL3' are formed side by side on a semiconductor substrate, and a plurality of sub bit lines SBL1', SBL2' SBL3', SBL4' are formed to orthogonally cross the word lines WL1', WL2', WL3' on the upper part of the word lines WL1', WL2', WL3'. A trench region is formed on the semiconductor substrate exposed by the word lines WL1', WL2', WL3' and the sub bit lines SBL1', SBL2', SBL3', SBL4'. An interlayer insulation layer is formed over the entire plane, after the trench region is formed, and the bit lines BL1', BL2' are formed side by side on the interlayer insulation layer.
Inventors:
RI UNKYO
HI BINSHAKU
HI BINSHAKU
Application Number:
JP2001045486A
Publication Date:
October 12, 2001
Filing Date:
February 21, 2001
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
H01L21/027; G11C17/12; H01L21/8246; H01L27/112; (IPC1-7): H01L21/8246; H01L27/112
Attorney, Agent or Firm:
Hattori Masaki
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