PURPOSE: To secure the accurate tuning by counting the pulses and then extracting the pulses through the low pass filter in the form of the DC voltage for tuning.

CONSTITUTION: The FF0∼FF3 forming the 1st counter circuit count repetitively up to 0∼1111 which are supplied to input terminal 12. The output of each FF is supplied to NOR circuit 13, and thus flip-flop 14 is reset by count value 0000. This set state is continued until the reset pulse is supplied to terminal R of flip-flop 14, and as a result the DC voltage delivered via low pass filter 15 is proportional to the time from set to reset. The reset pulse is delivered through the coincidence circuit when the coincidence is obtained between the count value of FF0∼FF3 and the set value of channel selection memory part 24.