To obtain the chaos generating circuit which is easily LSI-implemented while having a wide dynamic range by including a linear mapping circuit which has a CMOS transistor and a load component connected in series.

The sources of a P channel transistor 14 and an N channel transistor 15 which are manufactured by CMOS process technology are connected to a plus power source VDD11 and a minus power source VSS 12 respectively. The gates of the transistors 14 and 15 are connected in common to form an input terminal Vi13. A load element 18 (impedance) is connected between the drains of the transistors 14 and 15 and the potential generated across the load element 18 is an output Vo. When a linear voltage is applied as an input voltage Vi13, a through current ID flows from the VDD11 to the VSS12. Closer the input voltage/output current characteristics are to an ideal secondary function, stabler the chaos becomes that the linear mapping circuit generates.