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Patent Searching and Data


Title:
CHECK PROCESSOR, HOST COMPUTER FOR CHECK PROCESSOR AND CHECK PROCESSING METHOD
Document Type and Number:
Japanese Patent JP2005149013
Kind Code:
A
Abstract:

To provide a check processor, a host computer for the check processor and a check processing method for smoothly executing banking operations by accurately detecting the multi-feeding of sheets in simple configurations.

This check processing system 1 is provided with a check processor 100 and a host computer 200 communicatively connected to the check processor 100. The check processor 100 acquires check information from a check S, and transmits it to the host computer 200, and temporarily stops the check S. Then, the host computer 200 confirms the presence/absence of the multi-feeding of checks in the check processor 100 based on the received check information, and issues a print instruction to instruct the check processor 100 to execute print to the check S according to a confirmation result. The check processor 100 receives the printing instruction, and then executes endorsing print to the check S.


Inventors:
FUJIKAWA MASAFUMI
Application Number:
JP2003384060A
Publication Date:
June 09, 2005
Filing Date:
November 13, 2003
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
B42D15/10; G07D7/00; G07D7/0047; G07D7/04; G07D7/164; G07D7/183; G07D7/20; G07D9/00; G07D13/00; G07F7/04; H04N1/00; (IPC1-7): G07D9/00; B42D15/10; G07D7/00; G07D7/04; G07D7/20; H04N1/00
Attorney, Agent or Firm:
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa