Title:
CHIP-ARRANGED MODULE AND CHIP ARRANGEMENT METHOD
Document Type and Number:
Japanese Patent JPH04269900
Kind Code:
A
Abstract:
PURPOSE: To provide a chip arraying system in a module constitution in which chips can be simultaneously mounted on a circuit board. CONSTITUTION: A chip arraying system 10 in a module constitution for simultaneously mounting element chips on a circuit board 14 is provided, and chip arraying modules 12 are provided. Each module 12 is provided with a conveyer means for receiving a circuit board 14 from one adjacent module, and transporting the circuit board 14 through the pertinent module to one adjacent module next to it. Moreover, each module includes chip arraying sub-assembles for simultaneously mounting chips on the circuit board 14 for realizing a scheduled geometrical pattern. Moreover, each module includes a load plate 20, and the load plate 20 can be slid and detached from a module for conveying the stack of the chips for realizing the desired geometrical pattern.
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Inventors:
RONARUDO YUUJIIN HANTO
BAARON YUUJIIN HOWAITOHETSUDO
BAARON YUUJIIN HOWAITOHETSUDO
Application Number:
JP29642491A
Publication Date:
September 25, 1992
Filing Date:
October 15, 1991
Export Citation:
Assignee:
IBM
International Classes:
B23P21/00; H05K13/04; (IPC1-7): B23P21/00; H01L25/00; H05K13/04
Domestic Patent References:
| JPS5065874A | 1975-06-03 | |||
| JPH01239899A | 1989-09-25 | |||
| JPH02234497A | 1990-09-17 | |||
| JPS649758A | 1989-01-13 | |||
| JPS6171693A | 1986-04-12 | |||
| JPS5740553U | 1982-03-04 |
Attorney, Agent or Firm:
Kiyoshi Goda (4 outside)