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Title:
CHIP CARRIER
Document Type and Number:
Japanese Patent JPH03280559
Kind Code:
A
Abstract:

PURPOSE: To simply obtain highly reliable chip carrier wherein soft errors are not generated by α rays, by arranging an α rays shielding plate, at the part of a substrate which part faces an IC.

CONSTITUTION: A substrate 1 has a plurality of pads 2 on the upper surface and plurality of I/O bumps 3 on the lower surface, and the pads 2 and the bumps 3 are connected by using inner wirings 4. An α-ray shielding plate 6 is fixed to the part of the substrate 1 which part faces an IC 5, by using adhesive agent 10 or the like. Said plate 6 is, e.g. a film of polyimide resin in which radioactive elements of uranium and thorium as impurities are little. The IC 5 having a plurality of leads 7 is mounted on the substrate 1, after the leads 7 are shaped into a specified figure. The leads 7 and the pads 2 are connected by gold-gold thermocompression bonding method or the like. A cap 8 is bonded to the IC 5 by using adhesive agent 9. The cap 8 is bonded to also the substrate 1 by suing adhesive agent 11, and seals the IC 5. Since the α-ray shielding plate 6 is present on the substrate 1 surface facing the circuit surface existing on the lower surface of the IC 5, the α rays generated by the substrate 1 are cut off, and soft errors are not generated in the IC 5 by the α rays.


Inventors:
YAMAGUCHI YUKIO
Application Number:
JP8270890A
Publication Date:
December 11, 1991
Filing Date:
March 29, 1990
Export Citation:
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Assignee:
NEC CORP
International Classes:
H05K9/00; H01L23/02; (IPC1-7): H01L23/02; H05K9/00
Attorney, Agent or Firm:
Uchihara Shin



 
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