Title:
CHIP FOR CELL SWITCH FABRIC
Document Type and Number:
Japanese Patent JPH07321824
Kind Code:
A
Abstract:
PURPOSE: To obtain an IC chip for constituting a different switch fabric by relating respective port line groups consisting of respective lines corresponding to input and output ports to the same memory data bus. CONSTITUTION: Each N port line SR block 71 interfaces with a memory data bus 72 connected to a memory bank 73 to be a cell body sharing memory. Clock/control signals are supplied to respective corresponding buses 74 and these signals are generated from respective shift registers in respective blocks 70 or the parallel transfer of these signals is generated in prescribed order and the transfer of cell body bits for writing/reading in/from banks 73 is executed on the buses 72 based on addresses supplied to lines 75. Each chip for a switch fabric has M memory buses related to B Nport SR line blocks 71. Each chip includes a clock/control circuit 77 provided with external clock signals CLK1, CLK2.
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Inventors:
KOSUTASU KARAMUBOKISU
DEIBITSUDO BANKUSU
DEIBITSUDO BANKUSU
Application Number:
JP10283995A
Publication Date:
December 08, 1995
Filing Date:
April 27, 1995
Export Citation:
Assignee:
HEWLETT PACKARD CO
International Classes:
H04L12/56; H04Q3/52; H04Q11/04; H04Q3/00; (IPC1-7): H04L12/28; H04Q3/00; H04Q3/52
Attorney, Agent or Firm:
Tsukio Okada (1 person outside)