Title:
CIRCUIT ARRANGEMENT COMPENSATING CHANGE OF PULSE DURATION
Document Type and Number:
Japanese Patent JPH03175850
Kind Code:
A
Abstract:
PURPOSE: To obtain a compensating circuit, suitable for an integrated circuit by inverting a signal passed through a signal path with an inverter and subsequently inverting the signal again with an inverter by passing the signal through a copy of the signal path. CONSTITUTION: A pulse signal passed through a circuit section B1 is inverted by an input inverter I1. The inverted signal is impressed on the copy NA corresponding to the circuit section B1. Then the inverted signal passes through the copy NA, is inverted again by an output inverter I1, provided inside the copy NA and a pulse substantially without distortion is taken out of an output A1.
Inventors:
MIHIYAERU BEERENSU
Application Number:
JP31257190A
Publication Date:
July 30, 1991
Filing Date:
November 17, 1990
Export Citation:
Assignee:
PHILIPS NV
International Classes:
H03K5/01; H03K5/04; H04L25/03; (IPC1-7): H03K5/01; H04L25/03
Attorney, Agent or Firm:
Tadahiko Ito