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Title:
CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2013036819
Kind Code:
A
Abstract:

To miniaturize and simplify a circuit board by acquiring a manufacturing technique of circuit boards capable of deriving the number of specific electrode pads to be disposed in a DUT (Device Under Test) part when the number of internal wiring layers of the circuit board are fixed and, thereby deriving the minimum number of internal wiring layers to be required when a predetermined number of specific electrode pads are disposed in the DUT part.

When the number of specific internal wiring layers is A, the number of columns of a plurality of surface electrode pads disposed in each DUT part is N, and the number of specific surface electrode pads to be disposed in each DUT part is B, the number B of the specific surface electrode pads satisfies the following relational expression: B<(X+1)×A (where X is a natural number from 1 to N).


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Inventors:
SUZUKI KENJI
AKITA KAZUE
ONO TSUYOSHI
Application Number:
JP2011172261A
Publication Date:
February 21, 2013
Filing Date:
August 05, 2011
Export Citation:
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Assignee:
NGK SPARK PLUG CO
TOYOSHIMA DENKI KK
International Classes:
G01R1/073; G01R1/06; G01R31/26; H01L21/66
Domestic Patent References:
JP2010249828A2010-11-04
JP2003318307A2003-11-07
Foreign References:
US20090004891A12009-01-01
Attorney, Agent or Firm:
Patent Business Corporation Sakura International Patent Office



 
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