Title:
CIRCUIT, DEVICE, AND METHOD FOR SIGNAL PROCESSING
Document Type and Number:
Japanese Patent JP2020009317
Kind Code:
A
Abstract:
To minimize power consumption.SOLUTION: A signal processing circuit disclosed herein comprises: a plurality of first circuits, each comprising a first duration signal output circuit configured to output a first duration signal representing a duration between first timing at which a first input signal changes its level and second timing at which a second input signal changes its level, and a second duration signal output circuit configured to output the first duration signal as a second duration signal at timing based on a control signal; and a second circuit configured to output a second duration signal representing the longest duration among all the second duration signals output by the plurality of first circuits.SELECTED DRAWING: Figure 8
Inventors:
MATSUMOTO TOMOHIRO
OIKE YUSUKE
SEKIYA AKIHITO
YAMAGISHI HIROYUKI
IKETANI RYOJI
OIKE YUSUKE
SEKIYA AKIHITO
YAMAGISHI HIROYUKI
IKETANI RYOJI
Application Number:
JP2018131664A
Publication Date:
January 16, 2020
Filing Date:
July 11, 2018
Export Citation:
Assignee:
SONY CORP
International Classes:
G06G7/60
Attorney, Agent or Firm:
Sakai International Patent Office