Title:
CLOCK ADJUSTMENT SYSTEM
Document Type and Number:
Japanese Patent JPH06124138
Kind Code:
A
Abstract:
PURPOSE: To highly precisely adjust a clock in a few hardware.
CONSTITUTION: One of reference clocks distributed from the output of a clock distributing LSI 1 by using a tree-shaped wiring 2 is received by one LSI terminal, and a difference between the output phase of the reference clock and the output phase of a clock generated from a clock source which is the same as the reference clock, and allowed to pass through a general distribution path is observed. Thus, the phase adjustment of the clock can be attained.
Inventors:
KUBOTA KATSUHISA
Application Number:
JP27324092A
Publication Date:
May 06, 1994
Filing Date:
October 12, 1992
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G06F1/10; G06F15/78; (IPC1-7): G06F1/10; G06F15/78
Attorney, Agent or Firm:
Masao Yamakawa