Title:
CLOCK SIGNAL GENERATING DEVICE, CONTROL PROGRAM, AND CONTROL METHOD
Document Type and Number:
Japanese Patent JP2022147906
Kind Code:
A
Abstract:
To provide a clock signal generating device that can generate a highly accurate time synchronization clock signal considering the influence of a delay in satellite signals on estimation time.SOLUTION: A clock signal generating device 10 includes a phase comparator circuit 110, a processing circuit 120, and an oscillation circuit 150. The phase comparator circuit 110 performs phase comparison between a PPS signal PPSQ and a clock signal CLK and outputs a phase difference signal PH. The processing circuit 120 outputs a frequency adjustment signal LPQ based on the phase difference signal PH. The oscillation circuit 150 generates a clock signal CLK in a frequency corresponding to that of the frequency adjustment signal LPQ. The processing circuit 120 estimates the accuracy error of the PPS signal PPSQ based on captured satellite information ISAT from a GNSS receiver 200 and PPS output information IPPS and corrects the phase difference signal PH based on the accuracy error.SELECTED DRAWING: Figure 3
Inventors:
SHIINA JUN
Application Number:
JP2021049371A
Publication Date:
October 06, 2022
Filing Date:
March 24, 2021
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
H03L7/14; G01S19/23; G04G3/02; G04R40/02; H03L7/093
Attorney, Agent or Firm:
Noboru Takekoshi
Inoue Hajime
Yasushi Kuroda
Hiroaki Nishikawa
Inoue Hajime
Yasushi Kuroda
Hiroaki Nishikawa