To solve the problem of a conventional CMOS analog switch circuit that can not transmit an analog signal at a high speed because the ON resistance gets higher at a voltage VaVDD/2 of the analog signal.

In the CMOS analog switch circuit wherein an N-channel MOSFET 4 and a P-channel MOSFET 5 are connected in parallel between input and output terminals 1, 2 of the analog signal Va and the MOSFETs 4, 5 of both the channels are simultaneously ON-controlled or OFF-controlled by a control signal Vc from a control signal input terminal 3, an ON resistance reduction circuit 10 is connected between the control signal input terminal 3 and the gate of the MOSFET 4. In the ON resistance reduction circuit 10, a capacitor 15 is charged up by a power supply voltage in the case of the OFF control and the control signal Vc is boosted to the ON control level by a voltage charged across the capacitor 15 and the boosted voltage is fed to the gate of the MOSFET 4 in the case of the ON control.