PURPOSE: To obtain a coding/decoding system whose efficiency is enhanced by separating buses to attain coding/decoding in parallel with DMA transfer.

CONSTITUTION: A bus buffer 23 separates buses into buses 10a, 10b and an input/output device 22 changes over line memory switching circuits 24, 25 so that a line memory 27 is placed to the side of a DMA controller 14 and a line memory 26 is placed to the side of a microprocessor 11. When one line of picture information undergoes DMA transfer from a read circuit 16 to the line memory 27, the DMA controller 14 sends a signal TC to the input/output device 22 to switch the line memory switching circuits 24, 25. The microprocessor 11 reads data in the memory 27, codes it and a coded data stored in the buffer memory 20 is modulated by an MODEM 21 and transmitted. The microprocessor 11 applies coding/decoding in parallel simultaneously with the DMA transfer among the read circuit 16, a recording circuit 18 and the memories 26, 27 in this way.