To provide a coefficient interpolation circuit with simple constitution in which whether to perform or not to perform coefficient interpolation can be selected freely.

A data processing circuit is equipped with a program RAM 22; a coefficient RAM (new) 32 in which a new coefficient after change is stored at the time of changing a coefficient; a coefficient RAM (middle) 34 in which an old coefficient before change is stored at the time of changing the coefficient; and an arithmetic circuit 23 which operates according to a program and a coefficient. Moreover, the data processing circuit is equipped with; a program counter 27 which reads a program in the program RAM 22 and coefficients in the coefficient RAMs 32, 34; and a coefficient interpolation circuit 50 which generates a coefficient which changes successively from the coefficient in the coefficient RAM (middle) 34 toward the coefficient in the coefficient RAM (new) 32, and which outputs it to the arithmetic circuit 23. Then, whether the coefficient interpolation circuit 50 is to be made effective or ineffective is controlled by an interpolation control signal HC which is included in the program and moreover a completion judgement circuit 44 judges the completion of coefficient interpolation.